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Table of Contents

  1. Game Cards
  2. LCD Screen
  3. Buttons

Game CardsCard Pinout

The Lynx cartridge interface has numerous scars of its past as a tape drive. Data are accessed indirectly through a shift register and counter. Pin 1 is on the right side of the game card with the label facing towards you.

Pin# Description
----- -----------
2 Data 3
3 Data 2
4 Data 4
5 Data 1
6 Data 5
7 Data 0
8 Data 6
9 Data 7
10 CS_0n
11 Offset 1
12 Offset 2
13 Offset 3
14 Offset 6
15 Offset 4
16 Offset 5
17 Offset 0
18 Offset 7
19 Block 4
20 Block 5
21 Block 6
22 Block 7
23 Block 3
24 Block 2
25 Block 1
26 Block 0
27 CS_1n
28 Offset 8
29 Offset 9
30 Offset 10
31 Soft Power VCC
33 VCC (+5VDC)
34 SWVCC (+5VDC)

Pins 2-9: 8-Bit bidirectional data bus.
Pin 10: Active low chipselect, strobed on reads or writes to $FCB2.
Pin 27: Active low chipselect, strobed on reads or writes to $FCB3.
Pin 31: Supply for the 4069 Hex Inverter used for the soft power control in the Lynx. This is usually connected to Pin 33 in game cards so the Lynx only powers on when a card is inserted.
Pin 32: General Purpose IO controlled by $FD8A.4 (Direction- 0 = Input, 1 = Output) and $FD8B.4 (Driver / Input State). After reset this pin is HIGH on early Lynx revisions and LOW on later ones.
Pin 34: Switchable power supply controlled by $FD8B.1 (0 = Supply Enabled, 1 = Disabled)

Reading and Writing

The block and offset pins are combined to yield an address with the lower address lines being specified by the offset, and the upper address lines specified by the block select.

The Block pins are driven by a 74164 shift register, new data may be shifted into it by setting $FD8B.1 to the bit to shift and then setting $FD87.0 low and then high (rising edge). The offset pins are connected to a 744040 (12-Bit Counter) which is incremented on each read or write to $FCB2 or $FCB3 and cleared by setting $FD87.0 high.

LCD ScreenRibbon Pinout

The original (skateboard sized) Lynx has its LCD directly soldered to the mainboard. However, the later revisions use a 26-Pin ribbon connector.

Pin# Description
--- -----------
1,2 VCC (+5VDC)
3-8 Magic LCD Timing Signals
10 ???
11 Pixel Clock A (Idles HIGH)
12 Pixel Clock An (Idles LOW)
13 Pixel Clock B
14 Pixel Clock Bn
15 Pixel Clock C
16 Pixel Clock Cn
17 Pixel Data 1
18 Pixel Data 3
19 Pixel Data 0
20 Pixel Data 2
21 LCD Resetn / VBLn
22 Contrast Adjustment Special
23 Contrast Adjustment Special
24 Contrast Adjustment Special
25 ???
26 Ground

Pins 3-8: Several clocks of varying frequency and amplitude. While these are important for controlling the LCD, they're not very useful for extracting pixel data.
Pin 9: Idles low, rising edge signifies the end of the current line.
Pins 11-16: These differential clocks toggle when the Pixel Data pins should be latched (DDR). The three pairs correspond to the three drawing columns of the LCD (see TIMING section).
Pin 21: Lowers at the beginning of vertical blank, the exact timing of this depends upon the LCD configuration (see TIMING section).
Pins 22-24: These vary with the state of the contrast knob.

Note that there is a difference in this interface depending upon the revision of MIKEY. BUT- it seems to only pertain to the magic LCD timing signals and not to the actual pixel clocking.

Pixel Timing

The Lynx's 160x102 display is a bit of an oddity when compared to other portable consoles of its era- the LCD timing is programmable. HBL and VBL frequencies are chosen by two of the eight system timers (Timer 0 for HBL and 2 for VBL). Therefore many games will use whatever refresh rate is convenient for them.

Sending data to the LCD panel itself is also quite interesting, the screen is divided into three 160-triad (RGB element) wide columns as shown below:

| | | |
| | | |
| A | B | C |
| | | |
| | | |

Pixel data is latched in a given column when its differential clock toggles (so a toggle on pins 11 and 12 would latch a pixel in Column A). A total of three latches are required to fill an entire pixel's worth of RGB data (4-Bits per latch, 12-Bit color).

Color order is identical to that of the triads on the LCD panel: Red is latched first, then green, and finally blue.

Note that no overlap is present in the three column clocks. They will always perform their 480 toggles in order ever line. First A, then B, and finally C. Some delay is present after the final column has finished before the next line begins.

The start of a line may be determined by the rising edge of Pin 9 (HBL). A total of 105 lines are sent each frame, the first three of which should be ignored (vertical blank).

Pin 21 will lower at the beginning of VBL, but only after the display has been initialized by the game software. So the startup screen displayed during the decyrption process will have no proper vertical blank generation. This still works since the LCD will wrap around after 105 lines worth of data.


While the original Lynx has its buttons and directional pad right on the mainboard, the later (and more compact) Lynx has moved them to a plastic membrane. This interfaces with the mainboard using a 14-Pin ribbon.

The pinout for the ribbon connector is given below, traced from a C104126-001 REV.A membrane.

Directions are listed according to their use in the console's right-handed (default) orientation. All buttons aside from the soft power on/off switch are active-high (shorted with pin fourteen when pressed).

Pin# Description
--- -----------
1 Orange LED Cathode
2 Left
3 Up
4 Down
5 Right
6 Soft Power Drain
7 Soft Power Select
8 Backlight Toggle
9 Option 1
10 Pause
11 Option 2
12 B
13 A
14 Button & LED Supply

Pin 7: Briefly connecting this pin with pin six will turn the console on, while connecting it to pin fourteen will do the opposite. This alters a small feedback loop made using some inverters which controls whether or not to enable the Power MOSFET.


All of this behavior has been verified using real Lynx hardware, but that does not necessarily mean it's correct!.

This information has been reproduced here with permission from Osman Celimli.

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